Eur. Phys. J. Appl. Phys. 56, 34106 (2011)
https://doi.org/10.1051/epjap/2011110138

Organic field-effect transistor with octadecyltrichlorosilane (OTS) self-assembled monolayers on gate oxide: effect of OTS quality

¹ Université de Bordeaux, Laboratoire d’Intégration du Matériau au Système (IMS), CNRS UMR 5218, ENSCBP, 16 av. Pey Berland, 33607 Pessac Cedex, France
² Institut des Sciences Moléculaires (ISM), UMR 5255, Université Bordeaux, Bât. A12, 351 cours de la Libération, 33405 Talence Cedex, France

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Received: 6 April 2011
Revised: 7 April 2011
Accepted: 13 September 2011
Published online: 23 November 2011

Abstract

The effect of OTS (octadecyltrichlorosilane) Self-Assembled Monolayer (SAM) grafted on SiO₂ gate dielectric of pentacene-based OFETs (organic field-effect transistors) is investigated. A significant improvement of the charge mobility (μ), up to 0.74 cm²/V s, is reached thanks to OTS treatment. However, in spite of improved performances, several drawbacks, such as an increase in mobility dispersion, substantial hysteresis in I_DS-V_G characteristics and high threshold voltages (V_T), are observed. Changing solvent and deposition method turns out to have no significant effect on the mobility dispersion. A more accurate approach on the evolution of the mobility and the threshold voltage dispersion with OTS storage time highlights the effect of the OTS solution aging. Even if no difference is evidenced in the surface energy and roughness of the OTS layer, electrical characteristics exhibit considerable deterioration with OTS solution storage time. Using an “aged” OTS solution, opened under air, kept under argon and distilled before use, results in an increase of the I_DS-V_G hysteresis as well as in V_T and in mobility dispersion. In comparison, fresh-OTS-based OFETs present a very low hysteresis, a threshold voltage close to 0 and a much lower mobility dispersion. It is demonstrated that aged OTS solutions contain impurities that are not removed by distillation process, which leads to a less densely packed layer causing interfacial charge traps thus deteriorated performances.