Eur. Phys. J. Appl. Phys. 27, 21-27 (2004)
https://doi.org/10.1051/epjap:2004072

Ultra thin gate oxide characterization

¹ STMicroelectronics, Central R&D labs, 850 rue Jean Monnet, BP 16, 38926 Crolles, France
² L2MP, IMT Technopole de Château-Gombet, 13451 Marseille, France
³ Philips semiconductors, Central R&D labs, 850 rue Jean Monnet, BP 16, 38926 Crolles, France

Corresponding author: david.roy@st.com

Received: 18 August 2003
Accepted: 10 February 2004
Published online: 15 July 2004

Abstract

The increase of the gate leakage current of advanced CMOS technologies makes standard electrical characterization methods as C(V) measurement or charge pumping more complex and uncertain. In this paper, and based on C(V) characteristics, main elements that directly affect the electrical measurements of ultra thin MOS devices are clarified. Then, classical parameter extraction techniques are reviewed, pointing out their absolute limitations or giving potential keys of improvement.